Variability-aware double-patterning layout optimization for analog circuits
spiedigitallibrary.org
Variability-aware double-patterning layout optimization for analog circuits
The semiconductor industry has adopted multi-patterning techniques to manage the delay in the extreme ultraviolet lithography technology. During the design process of double-patterning lithography layout masks, two polygons are assigned to different masks if their spacing is less than the minimum printable spacing. With these additional design ...
Mar 20, 2018
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