Electronics Weekly

Xilinx rolls out IP cores for AMBA AXI4-based FPGAs

Xilinx has started its introduction of intellectual property (IP) cores that meet the AMBA 4 AXI4 bus specification for on-chip interconnections in its FPGAs. Xilinx’s interest in the AMBA AXI4 ...
New Electronics

Xilinx updates ISE Design Suite to support AMBA 4 AXI4 spec

As the first stage in the introduction of IP cores that meet the AMBA 4 AXI4 specification for interconnecting functional blocks in SoC design, Xilinx has released ISE Design Suite 12.3. "Xilinx is ...
Design-Reuse

Xilinx ISE Design Suite 12.3 Introduces AMBA 4 AXI4 IP Cores, Enhances PlanAhead Design and Analysis Cockpit, Extends Power Optimization

Release of ISE Design Suite 12.3 Begins Roll-Out of IP Supporting AXI4 interfaces for Plug-and-Play FPGA Design SAN JOSE, Calif., Oct 05, 2010 --Xilinx, Inc. (Nasdaq: XLNX) today announced the release ...
EDN

Xilinx ISE 12 adds intelligent clock gating

SAN FRANCISCO—Xilinx Inc. Monday (May 3) introduced a new version of its ISE Design Suite to support its Virtex-6 and Spartan-6 FPGA families. According to the company, ISE 12 adds intelligent clock ...
EDN

Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

The ARM® core AMBA® specification (version 4.0) AXI interconnect standard includes three Advanced eXtensible Interface version 4 (AXI4) interconnect protocols—AXI4 interconnect, AXI4-Lite protocol, ...