EDN

IMEC details high-k metal gate planar CMOS progress

At the IEEE International Electron Devices Meeting being held this week, Leuven, Belgium-based nanotechnology research center IMEC is reporting significant progress in improving the performance of ...
EDN

IMEC outlines nickel-silicide metal-gate CMOS

LONDON — Belgian research organization IMEC has presented on a scheme to use fully-silicided (FUSI) nickel-silicide metal gates with high-k dielectric CMOS transistors at the International Electron ...
Semiconductor Engineering

Designing into A Foundry Low-Power High-k Metal Gate 28nm CMOS Solution

28nm Super Low Power is the low power CMOS offering delivered on a bulk silicon substrate for mobile consumer and digital consumer applications. The 28nm process technology is slated to become the ...
Nature

Integrated nanoelectronics for the future

Gordon Moore's prediction made over 40 years ago, that the number of transistors in an integrated circuit would double roughly every 24 months, continues to be the guiding principle of the ...
Design-Reuse

BCD Technology: A Unified Approach to Analog, Digital, and Power Design

Since its inception, BCD technology has leveraged the integration of two primary technologies—polysilicon gate CMOS and DMOS power architecture—on the same chip. Its compatibility with bipolar ...
Design-Reuse

A Look at Metal eFuses

TechInsights reverse engineers chips to understand how they are made and in some cases why certain structures are the way they are. This article examines two electrically blown fuse structures (eFuse) ...