Driven by the need to objectively measure the progress of their verification efforts and the contributions of different verification techniques, IC designers have adopted coverage as a metric. However ...

This article is about our experience in applying formal verification techniques to an ASIC design in a large communication system. When we, in the Alcatel-Lucent IC design group in Nürnberg, Germany, ...

How formal verification is able to find bugs before signoff. Formal verification’s ability to mathematically prove exhaustively that a chip design meets a set of assertions. Formal techniques are ...