TechRepublic

Delay Time Analysis of Combined CMOS Ring Oscillator

CMOS ring voltage controlled oscillator with combined delay stages is presented. Initially, the general condition of oscillators is discussed then two common inverters are introduced and their delay ...
TechRepublic

Explicit Delay and Power Estimation Method for CMOS Inverter Driving On-Chip RLC Interconnect Load

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. Accurate and analytical expressions for the output load voltage, the ...
EDN

Sub-picofarad measurement with CMOS inverters

The inverters in a CMOS CD4069 can be used for both analog as well as digital applications. This Design Idea illustrates this by using all six inverters in a 4069 package to make a closed loop, ...
EDN

NBTI’s impact on timing

As process technologies continue to shrink, performance degradation due to aging is increasing. With time, cells become slower, which results in timing failures. NBTI (Negative Bias Temperature ...
Design-Reuse

Efficient logic optimization utilizing complementary behavior of CMOS gates

Any typical digital design style with CMOS uses complementary pairs of p-type and n-type MOSFETs for logic functions implementation. Naturally, CMOS always ought to provide INVERTED outputs like ...